Performance Benefits of Relaxed Memory Consistency for Process Network Applications
نویسندگان
چکیده
This work is the first to investigate whether using a relaxed consistency model has performance benefits over a sequential memory model when a multiprocessor executes a process network application. A trace-driven simulator, developed using SystemC, is used to model the distributed shared memory system of a prototype multiprocessor developed at Philips. The simulator offers two consistency models: Sequential Consistency (SC) and a generalized Relaxed Consistency (RC) model. Input traces are generated by running a process network application in a cycle-accurate simulator of the prototype multiprocessor. The results show that relaxed consistency has marginal performance benefits (6.13 to 14.9 percent execution time drop) over sequential consistency.
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